<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom" xmlns:sy="http://purl.org/rss/1.0/modules/syndication/" xmlns:media="http://search.yahoo.com/mrss/"><channel><title>Storage on Shaowen Chen's Website</title><link>https://www.chenshaowen.com/en/tags/storage/</link><description>Recent content in Storage on Shaowen Chen's Website</description><generator>Hugo -- gohugo.io</generator><language>en</language><copyright>&amp;copy;2016 - {year}, All Rights Reserved.</copyright><lastBuildDate>Sat, 15 Aug 2026 00:00:00 +0000</lastBuildDate><sy:updatePeriod>weekly</sy:updatePeriod><atom:link href="https://www.chenshaowen.com/en/tags/storage/atom.xml" rel="self" type="application/rss+xml"/><item><title>Storage Knowledge Every Operations Engineer Should Know</title><link>https://www.chenshaowen.com/en/blog/ops-storage-knowledge.html</link><pubDate>Sat, 15 Aug 2026 00:00:00 +0000</pubDate><atom:modified>Sat, 15 Aug 2026 00:00:00 +0000</atom:modified><guid>https://www.chenshaowen.com/en/blog/ops-storage-knowledge.html</guid><description>1 Volatile Memory 1.1 REG REG (Register) is a storage unit inside the CPU, sitting right next to the arithmetic unit — the fastest and smallest level of the storage hierarchy. General-purpose registers (RAX/RBX/RDI on x86, and so on) take part directly in instruction execution, with access latency around 0.2–0.5 ns (roughly one clock cycle), lost on power loss, and typically only tens to hundreds of bytes.</description><dc:creator>微信公众号</dc:creator><category>Operations</category><category>Storage</category><category>Systems</category><category>Architecture</category></item></channel></rss>