Chip on Shaowen Chen's Websitehttps://www.chenshaowen.com/en/tags/chip/Recent content in Chip on Shaowen Chen's WebsiteHugo -- gohugo.ioen©2016 - {year}, All Rights Reserved.Tue, 19 Mar 2024 00:00:00 +0000weeklyAI Chip High-Speed Interconnect Solutionshttps://www.chenshaowen.com/en/blog/ai-chip-high-speed-connection-solution.htmlTue, 19 Mar 2024 00:00:00 +0000Tue, 19 Mar 2024 00:00:00 +0000https://www.chenshaowen.com/en/blog/ai-chip-high-speed-connection-solution.htmlI have been studying the infrastructure around model training lately, and I found that AI chip interconnect topology determines the scheduling and resource allocation of training cluster jobs. So I spent a little time putting together the common AI chip interconnect solutions. 1. Point-to-Point Interconnect In a traditional PCIe system, data transfer between AI chips goes over PCIe, which cannot meet the demands of large-scale data transfer.微信公众号AIChipInterconnectHardwareOperations